阐述了一种复杂电路板故障检测单元的设计与实现，采用基于可编程片上系统（SOPC）技术研发电路板测试系统的思想，完成了检测单元的硬件设计和软件设计；该检测单元以现场可编程门阵列（FPGA）为核心，体现了SOPC系统集成度高、灵活性强的特点，并能缩短产品的开发周期；实际应用表明：该检测单元适用于批量化电路板故障检测，设计合理有效。

This article describes the design and implementation of a fault test unit for complicate printed circuit board,adopting the idea of researching printed circuit board test system based on system on a pro-grammable chip technology. The design of hardware and software for test unit is completed. The test unit with FPGA as the core reflects that SOPC is characterized by high level of integration and flexibility and shortens the period of developing production. The practical application indicates that the test unit is suit-able for plenty of printed circuit boards fault test and the design is reasonable and effective.

同步定时触发系统是重离子同步加速器的控制核心，控制磁场电源对带电离子束进行同步加速，其对可靠性和定时精度要求高。在重离子治癌、材料辐照等领域的发展中，为了满足这些领域对重离子同步加速器小型化的需求，本文以NIOSII为核心处理器，结合FPGA上的可编程片上系统（SOPC），实现了一种基于可编程硬件的同步定时触发系统。该系统可控制延时精度，且使用灵活、可靠，易升级，向小型化的同步加速器及重离子治癌等应用工程提供了切实可行的方案。

The synchronous timing trigger system is the control core of a heavy ion syn-chrotron and controls magnetic field power supply to accelerate charged ion beam .The high reliability and high timing precision are required for the system .With the develop-ment of some domains ,such as the heavy-ion cancer therapy and the material irradia-tion ,a synchronous timing trigger system in synchrotron was presented in order to meet the requirement of miniaturizing accelerator .This system was implemented based on the processor NIOSII and combined with the SOPC on FPGA .It is flexible ,reliable ,easy to upgrade ,and has controllable delay precision .The system ,as a feasible scheme ,can be suitable for the miniaturized accelerator and any application engineering like heavy-ion cancer therapy .

介绍了一种基于可编程片上系统(System on Programmable Chip,SOPC)SDRAM的通用测试方法和测试技术的系统实现。采用Altera的FPGA芯片EP3C40F484I7作为SDRAM的控制器,建立基于SOPC的嵌入式系统,编写对应的控制和测试程序。通过选择时钟频率和锁相环的相移,使得SDRAM时钟和控制器时钟同步,确保该SDRAM测试技术平台能够系统验证SDRAM芯片的工作状态。

This paper introduces a development method of SDRAM test technique based on system on programmable chip(SOPC).The FPGA chip of EP3C40F484I7 produced by Altera is acted as SDRAM control er,and building embedded system based on SOPC and editing corresponding test procedure. It can get the synchronization of clock between SDRAM and SDRAM control er by adjusting the frequency of clock and phase shift of PLL,which make sure that the SDRAM test platform could achieve the comprehensive functional tests of SDRAM chip.

SOPC集成了硬核或软核CPU、DSP、存储器、外围I/O及可编程逻辑,极大地方便了软件的开发。本设计采用Altera公司的CycloneII 2C35FPGA构建片上系统,与片外SDRAM和音频编解码芯片WM8731进行数据交换,构成音频系统,实现音频信号的A/D、D/A转换、存储与回放等功能,本文给出了该系统的相关软硬件设计。

SOPC is the system which integrated with the hard or soft core CPU, DSO, memory, peripheral I/O andprogrammable logic, greatly facilitated the development of software. This design used Altera''s CycloneII 2C35FPGA to build the system on a chip, to exchange data between the chip SDRAM and the audio codec chip WM8731, and then constituted the audio system to implement the audio A/D, D/A conversion, storage and playback functions. This paper presented the design of hardware and software of the related system.

瞳孔跟随光刺激的变换检测系统可广泛用于疲劳检测、颅内损伤检测等方面。为实现方便可控的刺激光源生成和光强检测,设计实现基于PSoC(Programmable System on Chip,片上可编程系统)芯片的光刺激与测量系统。以PWM(脉冲宽度调制)的方式驱动LED,PC端设计了应用控制界面,可以调节LED光照刺激的强度频率等参数,并实时获得光强数据。系统实际运用于实时瞳孔参数检测平台,提供稳定可控的光刺激与测量功能。

The pupil light reflex measuring system is widely used in the field of fatigue detection and intracranial injury detection , etc.For the purposes of controlling the stimulated light source and measuring the light intensity conveniently , the paper designs a light stimulation and measurement system based on PSoC ( Programmable System on Chip ) .The method of PWM is used to con-trol LED, and an application on computer is programmed to control the PSoC changing the parameters of LED and gain the data of light intensity .The system is used in a real-time pupil parameter detective platform to provide the adjustable functions of light stimulation and measurement .